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Chip Validation IP System Engineer - HSIO

上海 社招 · 全职 技术类 工程开发

职位描述

By joining us, you will collaborate with the world's leading CPU research team to design low-power and high-performance CPU products. Your job responsibilities include, but are not limited to: System-Level Requirement Analysis: Collaborate with architects and designers to break down SoC requirements, formulate IP validation strategies, and create executable test plans. Integration & Functional Validation: Develop and execute diagnostics and test cases on simulation, emulation, FPGA, and silicon platforms to validate IP features. Performance Profiling & Characterization: Prepare and execute silicon power/performance profiling test cases for all IP paths and monitor interactions with CPU/system. Debug & Silicon Issue Localization: Rapidly identify, reproduce, and isolate PCIE/UFS issues during validation cycles; expand and maintain a silicon diagnostic test suite for quick bug detection. Cross-Functional Collaboration: Work closely with DV, firmware, and platform teams to resolve issues across RTL, software, and real-silicon domains.

任职要求

Strong knowledge of high speed I/O subsystems: PCIe, UFS, USB (2.0/3.x), DP, DSI, networking, etc. Solid background in laboratory validation (oscilloscopes, protocol analyzers, logic analyzers). Programming skills in C, familiarity with UEFI or Linux driver development Scripting languages (Python or Shell). Familiarity with ARM AMBA bus: AHB, AXI, NI700, CI700, etc. Experience in FPGA/emulation validation platforms; hands-on experience with relevant hardware debug tools (e.g., TRACE32) is preferred. Practical knowledge of bring-up and debug for I/O protocols at both hardware and firmware levels. Strong analytical and troubleshooting ability for complex SoC systems. Excellent communication skills for cross-team coordination. Adaptability and self-motivation in a dynamic R&D environment. Academic Credentials: Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related disciplines. 5+ years of hands-on experience in SoC or I/O subsystem validation, chip bring-up, or related fields.
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